SubBytes, MixColumns, and AddRoundKey (see figure 4).
The datapath of the AES module contains combinational logic to calculate the AES transformations It makes use of clock gating to minimize power consumption. The RAM implementation is register based. As no spare memory is present for storing intermediate values, the controller has to assure that no State byte nor a key byte is overwritten if it is needed again during encryption. Modified States and calculated round keys overwrite previous values. The memory is single ported to ease silicon implementation.
